I am having trouble understanding exactly what to put in the register 34 and 35 to set the horizontal blanking position. Why are these set to 125 and 100 by the kernal? The register descriptions in The Programmers Reference Guide or Mapping the C128 isn't too clear about how this relates to other settings.
Horizontal blanking positions The VDC can adjust its horizontal blanking interval to blank a portion of the screen. These locations control the horizontal width and position of the blanked area. If the blanked area extends onto the active portion of the screen, any text under the blanked area is only covered, not erased. The value in register 34/$22 determines the rightmost blanked column, and the value in register 35/$23 determines the leftmost blanked column. The blanked area extends the entire height of the screen.
The value in register 34/$22 must be less than the value in register 0/$00; otherwise, the entire display will be blanked. The value in 34/$22 here must also be greater than the value in register 35/$23 to prevent an entirely blank display. The default values for these locations are 125/S7D and 100/$64, respectively. This positions the blanking interval entirely outside the active screen area. For purposes of blanking an area of the screen, a value of 6/$06 in these registers corresponds to the leftmost column of the standard screen and a value of 85/$55 corresponds to the rightmost column.
The best analogy is to think of them as two curtains on both sides of a stage. You can draw the left and right curtain independently.
You mean "inactive"? It only exists to the right of the display, sort of, when counting pixels from 0 to 1024/1016 at least. The kernal doesn't set the whole inactive area to the right of the screen either so it can't be right.
I have found some info that explains the standard resolution values. According to www.batsocks.co.uk/readme/video_timing.htm, in a composite signal the blanking should begin 1.65 µs (PAL) before the hsync and be 12.05 µs long. With a 16 MHz pixel clock each pixel takes 0.0625 µs. So to get the left blanking character, take the hsync character position, subtract as many characters as needed to get roughly 1.65 µs less. The standard VDC values subtracted two 8 pixel characters, which is 1 µs. Then to get the right blanking character, add as many characters as needed to add 12.05 µs. The standard VDC values adds 25 8 pixel characters, which is 12.5 µs. For NTSC, blanking should begin 1.5 µs before hsync and be 10.7 µs long.
Post by mrbombermillzy on Feb 16, 2017 19:23:57 GMT
Im not sure commodore used any real 'standards' when forcing the VICII/VDC to display output. You seem to be looking at the PAL display standard, whereas you should really be studying the CGA signal details, as this is closer to what the VDC outputs. The video standards seem to be slightly bent one way or another depending on the manufacturer who implements them. You are beter off using them as a guide and experimenting to get it right.
I summarised my VDC timing findings in rather more laymans terms when attempting to push the C128 VDC maximum resolution limit. The thread is here:
Good work on the resolution limit! I looked around for CGA signal information but that was harder to find. Anyway, lots of cables are sold using only the monochrome output to connect to TVs so I think PAL and NTSC standard signals are still relevant.