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Post by willymanilly on Sept 11, 2018 12:10:00 GMT
Dammit. I might have killed my rgbi to rgb converter by accidently reversing the polarity very briefly when connecting a new power source (stupidly rushing and not paying attention). Well looks like I'm back to monochrome until I get that fixed. I might not be able to post nice color pictures anymore of my results but at least it shouldn't prevent me from being able to test some of the internal timing of the VDC. I'll probably post an updated test program and results this weekend assuming I can keep this weekend free to dedicate to C128 stuff...
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Post by Pyrofer on Sept 12, 2018 19:45:06 GMT
Which adaptor were you using?
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Post by willymanilly on Sept 13, 2018 4:34:34 GMT
Which adaptor were you using? It was one of yours connected to a Gonbes GBS-8220 video converter. It served me well until I accidently reversed the polarity when reconnecting the power source, something you gave me good warning not to do so totally my fault for not being vigilant. I'm still able to use a monochrome connection so I haven't totally lost being able to test the VDC. I went to your website to see if I can buy a replacement but you seem out of stock. Any plans on creating any more? I don't need one urgently yet because I can get by with monochrome for the tests I'm currently working on but I will be in the market for a RGBI-RGB converter again soon.
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Post by Pyrofer on Sept 14, 2018 8:59:51 GMT
Are you able to remove the PLCC chip? If so you can probably just replace that, the rest are passives so should be fine. It will be a lot easier and cheaper to just replace that single chip than send a new board. If you can't remove the chip yourself we can probably work something out where you post it back and I fix it and return. Let me know via PM. Was it plugged into the 128 when you did that? If so it would have shorted the 5v you put into it onto the 128s ground... That worries me.
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Post by willymanilly on Sept 14, 2018 13:25:25 GMT
Thanks for the offer. I'll let you know via PM if I need to go down that path. I should have a bit of free time this weekend so I'll have a look at replacing the PLCC chip to see if that fixes things. Fortunately I didn't have it plugged in the c128 before I noticed the polarity was reversed with the power source.
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Post by Pyrofer on Sept 14, 2018 15:13:54 GMT
It's a custom chip so I will need to send you one. As long as you can remove the chip without damaging the board (use a plcc extractor not a flat screwdriver lol) I can post you just the chip to put back in.
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Post by willymanilly on Sept 14, 2018 20:44:11 GMT
Lol. Me use a screwdriver? I would never do that! (I did visually suss out if a screwdriver would work and came to the conclusion it wouldn't so was just going to buy a PLCC Extractor from Jaycar. ) I'll PM you.
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Post by mirkosoft on Sept 16, 2018 11:33:29 GMT
What about split VDC 80 columns and 40 columns (double-width)?
Miro
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Post by willymanilly on Sept 16, 2018 15:27:24 GMT
What about split VDC 80 columns and 40 columns (double-width)? Miro That will be interesting to see if that actually can be made to work without loosing the horizontal sync. I will add it as something to test and include it in the VDC split program if I have any success.
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Post by willymanilly on Sept 19, 2018 15:47:18 GMT
I've updated the VDC split program to display the number of main cpu cycles delayed after the lightpen trigger before applying the split. Other options include switching the VDC to PAL and NTSC. note: the horizontal frequency, vertical frequency, and scanlines on startup is the system default values.
I have also included a block fill test that fills 256 bytes of screen memory with 0. At the VDC split position it will block fill 256 bytes with the value 255. The flickering line is approximately the point where the blockfill finishes. These tests are giving me heaps of interesting results which I hope to use to improve the Z64K emulation of the VDC. The example screenshot below shows some behavior when the delay is set to 0411 where it seems wither the blockfill or the character fetch is being done in reverse to what is expected... You can see what I mean if you use the A and D keys to adjust the delay by one either way. There's plenty more tests I plan on including in addition to a double pixel mode split Miro has suggested. I plan on cleaning the whole interface and the source code which I will make available. Happy to provide it now to anyone feeling adventurous in writing their own test but I warn you my source code is not the cleanest at the moment.
Blockfill test
Attachments:vdcsplitv0.3.zip (1.56 KB)
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