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Post by tokra on Sept 20, 2020 10:21:07 GMT
I've gotten the 1084 up to 42 rows, after that it tends to loose sync and since the 1084 has no vertical hold control like the 1901 the picture will start rolling at that point. The 1901 can barely display 50 rows. I remember trying this back in 1992 or so and could not turn the knob far enough so the picture would not roll. Some 20 years later it suddenly worked. Either way: my current thinking is you should aim for PAL- and NTSC-compatible-modes that most devices can display (back then and now).
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Post by tokra on Sept 19, 2020 13:01:32 GMT
Not sure what you mean by that? Horizontal total (r0) should always be either 126 (NTSC) or 127 (PAL). Horizontal displayed (r1) is usually 80 so you have borders to the right and left depending on where the horizontal sync position (r2) is. So if you only display 50 columns instead of 80 you should have those centered.
Vertical is similar. You set vertical total (r4) and vertical displayed (r6) and the vertical sync position (r7). At PAL-resolution this means you only display 200 lines out of 312 which means borders at the top and bottom. With NTSC borders are not as bad with 200 out of 262 lines.
Because of those unused display areas I created two text-modes in VDC Mode Mania that make better use of the display area. For PAL this is a 9x11 char-mode and for NTSC 9x9.
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Post by tokra on Sept 19, 2020 12:40:10 GMT
I have done modes with vertical resolutions of 400 pixels (which would be 800 interlaced). Technically there is no real limit for the vertical height, you can define char height as 32 and set the vertical register to 255 which would be about 8192 lines. It all depends on the display device if you are able to get a stable picture. As I noted in VDC Mode Mania, the vertical refresh rate of the 640x400 non-interlace mode is about 37 Hz. If you want even more lines you need devices able to display even lower Hz. The 1901 barely does 37 Hz, on some you get a rolling picture. Not sure how low multisync-monitors go, but basically your user base shrinks to zero at that point.
Horizontal sync is a lot worse in that matter, anything to far off PAL or NTSC-standard will lead to non-display on most monitors.
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Post by tokra on Aug 25, 2020 12:20:34 GMT
Thanks again. I rearranged my code above as per your suggestions and it works like it should :-) The black area between the two half-frames is now much smaller. I even quickly tried a mixed graphic and text-mode, which would work well for adventures.
I think the key is to know when each register latches. From what you write above reg 4 and 6 should be set immediately after vblank=0 (so in the currently active area), but for how long after that is it "safe" to set the registers so they take effect for the displayed frame? And which registers need to be set or even can be set during the preceding frame (with vblank=0) or during the the vblank-area (vblank=1)?
BTW: My 8x1-mode right now is 480x252 without any tricks, however this way it has a quirky refresh-rate of about 56 Hz, right between PAL and NTSC.
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Post by tokra on Aug 24, 2020 20:11:13 GMT
Ok, gave this a quick try just now:
.C:1300 A9 20 LDA #$20 .C:1302 2C 00 D6 BIT $D600 .C:1305 F0 FB BEQ $1302 ; wait for VBLANK=1 .C:1307 2C 00 D6 BIT $D600 .C:130a D0 FB BNE $1307 ; wait for VBLANK=0 to display first half-frame .C:130c A9 13 LDA #$13 .C:130e A2 04 LDX #$04 .C:1310 20 CC CD JSR $CDCC ; vertical total to 19*8 lines .C:1313 A9 0D LDA #$0D .C:1315 A2 06 LDX #$06 .C:1317 20 CC CD JSR $CDCC ; vertical displayed to 13 lines for second half-frame .C:131a A9 10 LDA #$10 .C:131c A2 07 LDX #$07 .C:131e 20 CC CD JSR $CDCC ; turn on vertical sync at position 16 .C:1321 A9 20 LDA #$20 .C:1323 2C 00 D6 BIT $D600 .C:1326 F0 FB BEQ $1323 ; wait for VBLANK=1 .C:1328 2C 00 D6 BIT $D600 .C:132b D0 FB BNE $1328 ; wait for VBLANK=0 to display second half-frame .C:132d A9 13 LDA #$13 .C:132f A2 04 LDX #$04 .C:1331 20 CC CD JSR $CDCC ; vertical total to 19*8 lines .C:1334 A9 0C LDA #$0C .C:1336 A2 06 LDX #$06 .C:1338 20 CC CD JSR $CDCC ; vertical displayed to 12 lines for first half-frame .C:133b A9 40 LDA #$40 .C:133d A2 07 LDX #$07 .C:133f 20 CC CD JSR $CDCC ; turn off vertical sync .C:1342 4C 00 13 JMP $1300
Hope I am doing this correctly? I just split the same text-screen so the first half displays 12 text-lines and the second half 13 text-lines (same content). However I notice that when I put the screen to reverse (ESC+R) before starting that the black area between the to halfs is rather large. So it seems impossible to stitch two half-frames seamlessly together. However in VDC101 the black area seems much smaller. Am I doing something wrong or too much? I think I need to wait for VBLANK=1 and then 0 to correctly assert in which half-frame I currently am, right?
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Post by tokra on Aug 24, 2020 15:50:39 GMT
Thanks a lot! This actually is a fantastically simple and elegant idea! Can't wait to try this out for myself. One thing I am still unsure of: Register 4 has to be set globally or per sub-frame? If it is the latter I'm thinking of creating an 8x1-mode with a larger resolution than 255 vertical lines which is otherwise not possible with an 8-bit register. 312 lines would be nice for a PAL-compatible picture - so two sub-frames of 156 lines each in reg 4 for a total visible 288 lines (144 in each subframe's reg 6).
Regarding interlace I don't really understand how (or even if) it is possible to detect which field the VDC is in currently. On my original VDC Mode Mania it was basically trial and error and squinting at the monitor at close range to determine which field goes first.
The VDC is like the VIC was in the mid 1980s, still lots of secrets to discover, so much fun :-)
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Post by tokra on Aug 17, 2020 14:58:22 GMT
I asked mirkosoft to make me a moderator and he agreed. Since I log on almost daily, I will now strive to stop the spammers as soon as I see them. Feel free to use the report-function as well. The original forum-founder VDC 8x2 has not logged in since 2018, this makes me a little afraid that the forum may stop working should ProBoards decide to stop their service. Hopefully this will not happen anytime soon, but you never know...
I moved the discussion here since it felt misplaced in the Z64K-thread.
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Post by tokra on Jul 22, 2020 15:29:04 GMT
So, without looking at the code what method does VDC101 actually use to "divide the screen into two or more areas with independently controllable base addresses and x-y smooth scrolling" as the text in the demo says? I would like to understand and try this method maybe on interlace-mode and see what can be done there...
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Post by tokra on Jul 13, 2020 15:17:50 GMT
Why is it that the EasyFlash 1 works fine with the C128 and EasyFlash 3 does not? Can you explain the reasons and what you are doing about it so it does work?
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Post by tokra on May 1, 2020 8:18:55 GMT
I seem to remember to have read somewhere that this was an error in the german character-ROM. The german C128 has another character-set with german umlauts and the original Commodore-character-set as well. The @-character however seems to have this error and since my C128 and both the demo-programmer are german it seems he used that way to test for a C128.
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