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Post by Pyrofer on Jun 24, 2016 20:15:50 GMT
UGH. So the chip enable on the rom sockets is just grounded! So all the rom socket is ALWAYS enabled. They only toggle the output enable for reads. So I have no idea how I can enable writing to this chip from the 128 itself without serious logic mods. However, I did verify that I could read from the chip fine, I could see the bytes that should hold the time etc. So I just need to write the correct time and date to the chip and it should then be readable by the 128. For extra kicks I need to write an ML program so the "rom" has an autostart code, this copies the RTC into the correct ToD slot and then continues with a normal boot. If anybody can help me with that rom code I would appreciate it. It seems that once programmed with the boot code and the correct time it should pretty much be a plug and play RTC for the 128  |
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Post by Pyrofer on Jun 26, 2016 1:08:41 GMT
Got a converter built to connect an Arduino to the chip and spent a lot more time than I would hope working it out. However, I can now read and set the time in the chip. If I place it in the 128 and read the ram in bank 4 I get the time and date It needs 2 pins swapping so I ordered a couple chip sockets which I will mod to do that and then glue them together as an adaptor. Next is writing the code to read the RTC into the ToD and program that into the RTC SRAM. |
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Post by cthulhu on Jun 27, 2016 12:12:51 GMT
For extra kicks I need to write an ML program so the "rom" has an autostart code, this copies the RTC into the correct ToD slot and then continues with a normal boot. If anybody can help me with that rom code I would appreciate it. It seems that once programmed with the boot code and the correct time it should pretty much be a plug and play RTC for the 128 You can find some hints here: compgroups.net/comp.sys.cbm/c128-option-rom-how-to-s/170275 |
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Post by Pyrofer on Jun 27, 2016 16:07:53 GMT
So, please excuse me pasting his code here but I want help understanding it.
*= $8000
NOP ; that's for NMI handler AFAIR
NOP
NOP
JMP BEGIN
.BYTE $FF
.BYTE $43,$42,$4D
.BYTE $EA,$EA
BEGIN
LDA $FF00
AND #%00111111
STA $FF00
LDX #0
BEGLOOP
LDA BOOTSTART,X
STA $1300,X
INX
BNE BEGLOOP
JMP $1300
BOOTSTART here
So, I get that it starts at 8000 but why 3 NOPs? then it jumps to the beginning of the code, fair enough.
The bytes are for the auto detection of the rom, so required. Fair enough.
LDA $FF00, this gets the state of the bank register yes? Then it turns off the highest 2 bits (which banks are these?) and puts it back into the register.
Next we have a loop that copies 255 bytes of rom into ram and then jumps to that point in the ram?
What was the point of the register change for the banks?
My rom will simply copy the correct time from the RTC into the ToD registers and then carry on a normal boot. I don't want the ROM to be banked in, I want a normal boot from that point on. So I assume the last thing I do is change the bank register to the normal bank system which is what on boot? Also, I guess I then have to jump to an address to continue the boot, so what address do I jump to that continues the boot as if the function rom had not been there?
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Post by VDC 8x2 on Jun 27, 2016 21:21:33 GMT
So, please excuse me pasting his code here but I want help understanding it. LDA $FF00, this gets the state of the bank register yes? Then it turns off the highest 2 bits (which banks are these?) and puts it back into the register. The 2 highest bits control what ram bank the ram is coming from. bits 00 set it to bank 0 ram. |
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Post by ken on Jun 27, 2016 23:15:56 GMT
for prototyping/testing
just stick it in another socket and bend the legs of the socket
I do it all the time when I an building something new
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Post by ken on Jun 27, 2016 23:24:49 GMT
errr ignore that ... it wont let me delete it ....
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Post by Pyrofer on Jun 28, 2016 8:29:22 GMT
I think I have the code sort of worked out. Turns out you need to read/write the ToD in a particular order or it stops! wtf.
So now I just need to sort the 24 hour to 12hour+am/pm conversion and I am done.
I assume I can just end my routine with an rts?
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Post by remark on Jun 28, 2016 12:01:29 GMT
At the zimmers.net ftp area there is a file with drivers and schematics (SmartWatch-128.v2.sfx) that interfaces the smartwatch with control (joystick) port 2. It seems not so complicated. Screenshot of schematic in VICE:  Maybe this can be of use to you as an alternative approach (and use of the chip). |
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Post by Pyrofer on Jun 28, 2016 17:25:35 GMT
Just to prove I am "on the right track" here is a screen shot. This was take using my real 128 connected to a monitor, running.. Monitor. I simply displayed the contents of the option ROM socket. so the time when I took this screenshot was 18:11:05 Tuesday 28/06/16 Yes, this updates realtime inside the option rom. Repeated reads give the constant current time.  |
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