Location Purpose ------------------------------------------------------------------------------- $D074(*1) (53364) VIC Bank 2/GEOS Optimization (mirror $8000-$BFFF) $D075(*1) (53365) VIC Bank 1 Optimization (mirror $4000-$7FFF) $0076(*1) (53366) BASIC Optimization (mirror $0400-$07FF) $0077(*1) (53367) No Optimization (mirror all memory) (v1 default) $D07A(*2) (53370) Software Speed Select - Normal (1 MHz or 2 MHz in 128 Fast mode) $D07B(*3) (53371) Software Speed Select - Turbo (20 MHz) (*$D079) $D07E(*2) (53374) Hardware Register Enable $D07F(*2) (53375) Hardware Register Disable (*$D07D) $D0B0(*4) (53424) SuperCPU Mode Detect Register 00xxxxxx = SuperCPU v2 in 128 mode 01xxxxxx = SuperCPU v2 in 64 mode 11xxxxxx = SuperCPU v1, no SuperCPU, or SuperCPU disabled $D0B2(*4) (53426) Bit 7: Hardware Register Enable Flag (1=Enabled) Bit 6: System 1 MHz Flag (1=Enabled) $D0B3(*5,7) (53427) Enhanced Optimization Register (v2 only, see Version 2 Options) 00xxx1BZ = VIC Bank 0, $0000-$3FFF 01xxx0B0 = VIC Bank 1, $4000-$7FFF 00xxx0B0 = VIC Bank 2/GEOS, $8000-$BFFF 01xxx1B0 = VIC Bank 3, $COOO-$FFFF 10xxx0B0 = BASIC Opt., $0400-$07FF 11xxx00Z = No Opt. All Mem., $0:0000—$1:FFFF (V2 default) 11xxx1BZ = No Opt. per Bank, $0000-$FFFF 10xxx100 = Full Optimization (no mirroring of any memory) $D0B4(*5) (53428) Bits 7 & 6: Optimization Mode Flags: 00xxxxxx = VIC Bank 2/GEOS Optimization Enabled 01xxxxxx = VIC Bank 1 Optimization Enabled 10xxxxxx = BASIC Optimization Enabled 11xxxxxx = No Optimization $D0B5(*6) (53429) Bit 7: JiffyDOS Switch Flag (1=Enabled) Bit 6: Speed Switch Flag (1=Normal, 0=Turbo) $D0B6(*6) (53430) Bit 7: Processor Emulation Mode Flag (1=Emulation) Bit 6: Reset Switch Flag (1=Switch pressed) (v1 only) $D0B8(*4) (53432) Bit 7: Software Speed Flag (1=Normal, 0=Turbo) Bit 6: Master Speed Flag (1=Normal via any source) $D0BC(*5) (53436) Bit 7: DOS Extension Mode Flag (1=Enabled) Bit 6: RAMLink Hardware Registers Flag (1=Enabled) $D200—$D2FF(*4) System RAM (53760—54015) $D300-$D3FF(*5) User RAM (available for user programs) (54016-54271)
(*1) Write only, hardware registers must be enabled to activate location. (*2) Write only, active with hardware registers enabled or disabled. (*3) Write only, active with hardware registers enabled or disabled, but does not override hardware Speed switch. (*4) Read only with hardware registers disabled, Read/Write with hardware registers enabled, write access reserved for system only. (*5) Read only with hardware registers disabled, Read/Write with hardware registers enabled. (*6) Read only with hardware registers enabled or disabled (write with hardware registers enabled has no effect). (*7) Changing values in this area affects all other optimization mode registers, and changing other optimization mode registers affect this location. The B flag assigns control of this regster to a specific Commodore 128 Bank (0=Bank 0, 1=Bank 1), while the Z ﬂag contols mirroring of Zero Page and Stack memory ($0000—$01FF) (0=mirroring on, 1=mirroring off). Default for Z is 1, B is 0.
* Denotes a duplicate register location.
IMPORTANT NOTE: Enabling the SuperCPU hardware registers also causes some changes in the Kernal ROM memory map ($E000-$FFFF). To avoid problems, do not leave the hardware registers enabled any longer than necessary. Also note that mirroring of I/O is always performed when I/O is mapped in.
Thanks everybody! I'll incorporate this into my new Tempest-Alpha version.
The "correct" method (I presume) would be to test for C128 SuperCPU first (the $d0bc check mentioned by bjonte) and then make various changes through-out my program. However because I am both lazy and because I have no real hardware to test, I will just write the $d07a and $d07b registers to enable/disable the SuperCPU during the critical split-screen parts of TEMPEST 128. Obviously this limited approach fails to maximize the SuperCPU abilities, but it is easy to code and hopefully easy for users to report (it fails or it works).