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Post by strobe on Aug 25, 2020 2:36:36 GMT
Thanks a lot! This actually is a fantastically simple and elegant idea! Can't wait to try this out for myself. One thing I am still unsure of: Register 4 has to be set globally or per sub-frame? If it is the latter I'm thinking of creating an 8x1-mode with a larger resolution than 255 vertical lines which is otherwise not possible with an 8-bit register. 312 lines would be nice for a PAL-compatible picture - so two sub-frames of 156 lines each in reg 4 for a total visible 288 lines (144 in each subframe's reg 6). Regarding interlace I don't really understand how (or even if) it is possible to detect which field the VDC is in currently. On my original VDC Mode Mania it was basically trial and error and squinting at the monitor at close range to determine which field goes first. The VDC is like the VIC was in the mid 1980s, still lots of secrets to discover, so much fun :-) You're welcome! With reg # 4 you can change it on the fly as you can with reg # 6, the sub-frames don't need to be the same height. I've updated the above post about that, hopefully it's clearer. You will always have a gap between the sub-frames, this is because internal row 0 is always blank. This row 0 incidentally is where the vertical smooth scroll latches, unfortunately just before the VBLANK bit change at which point it's too late.. In your case using VDC-SPLIT to produce a valid PAL or NTSC video signal you should be able to achieve an active VDC-FLI area of close to 256 rows if you use the 2nd sub-frame for the top / bottom border & vertical sync pulse area. 256 rasters is close to the total viewable height on PAL monitors (~288) and way over what you'd see on NTSC screens so it's still pretty good and more than you'd get without the 2nd sub-frame. |
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Post by strobe on Aug 25, 2020 4:34:27 GMT
Ok, gave this a quick try just now: .C:1300 A9 20 LDA #$20
.C:1302 2C 00 D6 BIT $D600
.C:1305 F0 FB BEQ $1302 ; wait for VBLANK=1
.C:1307 2C 00 D6 BIT $D600
.C:130a D0 FB BNE $1307 ; wait for VBLANK=0 to display first half-frame
.C:130c A9 13 LDA #$13
.C:130e A2 04 LDX #$04
.C:1310 20 CC CD JSR $CDCC ; vertical total to 19*8 lines
.C:1313 A9 0D LDA #$0D
.C:1315 A2 06 LDX #$06
.C:1317 20 CC CD JSR $CDCC ; vertical displayed to 13 lines for second half-frame
.C:131a A9 10 LDA #$10
.C:131c A2 07 LDX #$07
.C:131e 20 CC CD JSR $CDCC ; turn on vertical sync at position 16
.C:1321 A9 20 LDA #$20
.C:1323 2C 00 D6 BIT $D600
.C:1326 F0 FB BEQ $1323 ; wait for VBLANK=1
.C:1328 2C 00 D6 BIT $D600
.C:132b D0 FB BNE $1328 ; wait for VBLANK=0 to display second half-frame
.C:132d A9 13 LDA #$13
.C:132f A2 04 LDX #$04
.C:1331 20 CC CD JSR $CDCC ; vertical total to 19*8 lines
.C:1334 A9 0C LDA #$0C
.C:1336 A2 06 LDX #$06
.C:1338 20 CC CD JSR $CDCC ; vertical displayed to 12 lines for first half-frame
.C:133b A9 40 LDA #$40
.C:133d A2 07 LDX #$07
.C:133f 20 CC CD JSR $CDCC ; turn off vertical sync
.C:1342 4C 00 13 JMP $1300Hope I am doing this correctly? I just split the same text-screen so the first half displays 12 text-lines and the second half 13 text-lines (same content). However I notice that when I put the screen to reverse (ESC+R) before starting that the black area between the to halfs is rather large. So it seems impossible to stitch two half-frames seamlessly together. However in VDC101 the black area seems much smaller. Am I doing something wrong or too much? I think I need to wait for VBLANK=1 and then 0 to correctly assert in which half-frame I currently am, right? I think I covered most of this in the previous post (it is impossible to seamlessly joins 2 sub-frames) and the updates to my main post but I would make the following observations: - You have the vertical total at 20, not 19 (remember the actual number of rows is reg #4 +1)
- You also have the displayed reg # 6 at 12 or 13, so you have by definition a 7 or 8 line gap, most of which you can use by increasing reg # 6 and/or decreasing reg # 4.
- Your comments suggest you are setting vertical displayed for the "other" sub-frame but as you are setting it with vblank=0 it takes effect immediately for the current frame (because you are IN the active area and the counters haven't hit that comparison yet) so you effectively have them backwards.
See my comments in the updated post about where to set reg 4 & 6 (basically "this" frame)
- Yes you need to wait for the VBLANK on/off cycle to know which frame you are in
I'll add some more to the main post about some of this in a bit. |
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Post by tokra on Aug 25, 2020 12:20:34 GMT
Thanks again. I rearranged my code above as per your suggestions and it works like it should :-) The black area between the two half-frames is now much smaller. I even quickly tried a mixed graphic and text-mode, which would work well for adventures.
I think the key is to know when each register latches. From what you write above reg 4 and 6 should be set immediately after vblank=0 (so in the currently active area), but for how long after that is it "safe" to set the registers so they take effect for the displayed frame? And which registers need to be set or even can be set during the preceding frame (with vblank=0) or during the the vblank-area (vblank=1)?
BTW: My 8x1-mode right now is 480x252 without any tricks, however this way it has a quirky refresh-rate of about 56 Hz, right between PAL and NTSC.
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Post by c128old on Aug 29, 2020 14:52:21 GMT
Interlace question (sorry if this is the wrong place, but I'm tirggerd by the trick to use differences in the two frames that VDC outputs).
VDC creates 'same' frames for non-interlace and presumably different frames in when interlace. I've used Z80, hoping to get a defined behavior but: still get unpredictable results (see 3 images below, the results of which make sense given that the video output shall start at 'half a line' for interlace) On the subject of playing around with the two frames in the VDC-101 demo: is there a way to 'reset' the VDC using SW? To make it start 'from scratch' so that one might know if one is in the odd or even frame? |
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Post by strobe on Sept 1, 2020 14:03:49 GMT
Thanks again. I rearranged my code above as per your suggestions and it works like it should :-) The black area between the two half-frames is now much smaller. I even quickly tried a mixed graphic and text-mode, which would work well for adventures. No worries! I've updated the original post with a lot more info on where/how to latch the registers and expanded the pseudo code. Hopefully it is a lot clearer (?) The short version which applies generally (even outside of the vdc-split method) for any kind of smooth inter-frame animation: - Reg #4 & 6 must be set just before the end of the active area of the current frame, i.e. before row 25 of a standard screen. So they don't need to be set immediately after vblank=0 but they must be set before vblank=1 again
- Reg #24 (vert smooth scroll) must be set before the VDC internally restarts at row 0. This is one character row above where vblank=0 again. So just set it when vblank=1 for simplicity.
You would typically set Reg # 25 (horiz smooth scroll) at this same point for consistency/logic.
My point is you could create a valid PAL or NTSC signal using vdc-split to make up the additional raster lines without sacrificing (m)any active FLI rows. |
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Post by wsoft on May 11, 2024 18:41:31 GMT
I used the latest GTK version of the X128 emulator to watch this. Really smooth.
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