Post by bjonte on Dec 9, 2019 9:03:58 GMT
I’m very confused about bits 0-3 in register 3 that controls the hsync pulse width. Mapping the C128 talks about counting character positions, but what does that actually mean? Is it fixed 8 pixel characters? Does it include intercharacter spacing? Double pixel mode doesn’t seem to be taken into account since the examples I have seen doesn’t touch this.