|
|
Post by bjonte on Feb 22, 2020 9:35:00 GMT
The delayed transfer feature of the REU uses address $ff00 to trigger the transfer. How does that work on the C128? Does it even work?
|
|
|
|
Post by oziphantom on Feb 22, 2020 9:47:59 GMT
it exists so you can set the right bank you want the DMA to take place in. other wise you would have to always DMA around the IO area. But with FF00, you set up the registers with IO enabled. Then write the bank you want to FF00 which then triggers the DMA to take place.
|
|
|
|
Post by willymanilly on Feb 22, 2020 11:16:18 GMT
Quote from the Commodore Ram Expansion Unit Controller - 8726R1 Technical Reference Documentation.
"If a transfer is programmed for 0xFF00 trigger option, bit 7 of register 0xDF01 remains set to 1 and no DMA transfer takes place, until the trigger event happens. For this reason command execution could be taken back by clearing bit 7 of register 0xDF01, as long as the trigger event did not happen. The trigger gets activated by writing some arbitrary value into C64/C128 address location 0xFF00. For the C128 at this address location there sits the Memory Mapper Unit (MMU) which organizes different memory banks, ROMs and the I/O area within this computer. By using write to this memory location as trigger event, with one write access a decent memory configuration can be programmed and a transfer started just after that. With the next cycle available to the main CPU the former memory configuration can be restored. On the C64, the MMU (actually a simple 6-bit processor port) sits at address locations 0x00 and 0x01 which makes MMU programming and DMA execution not so smoothly combinable."
|
|
|
|
Post by bjonte on Feb 22, 2020 16:06:21 GMT
So it was meant to be like that then. Good!
|
|
