Post by hydrophilic on Feb 2, 2021 6:29:22 GMT
Quick thought and maybe you guys have some opinions, but...
There is a series of 34 videos on YouTube about creating a 6502 emulator in C++ from scratch... these videos may be informative for anyone interested in writing an emulator in general (or as an introduction to 6502?). As a seasoned 6502 programmer I was constantly amazed at this guy's lack of knowledge about the CPU... but through perseverance he eventually developed a fair emulator. You can view the first of the series here: www.youtube.com/watch?v=qJgsuQoy9bc
More importantly, one of the things I don't think he ever got right was the RES(et) functionality of his emulator. As I recall from experimenting with a HARDWARE emulation of the 6502, available for free at Visual 6502, the NMI, IRQ, and RES all work (essentially) the same. They also work (essentially) the same as the BRK instruction.
Which got me curious and I started playing around with VICE. It seems VICE has a core bug: RES (reset). I mean this is, LITERALLY, the first the thing the CPU ever does when it powers on (or when it gets reset), and yet somehow the VICE team, despite all their otherwise amazing cycle accuracy, seems to have FAILED!
Three important things that most experienced 6502 programmers know:
There is a series of 34 videos on YouTube about creating a 6502 emulator in C++ from scratch... these videos may be informative for anyone interested in writing an emulator in general (or as an introduction to 6502?). As a seasoned 6502 programmer I was constantly amazed at this guy's lack of knowledge about the CPU... but through perseverance he eventually developed a fair emulator. You can view the first of the series here: www.youtube.com/watch?v=qJgsuQoy9bc
More importantly, one of the things I don't think he ever got right was the RES(et) functionality of his emulator. As I recall from experimenting with a HARDWARE emulation of the 6502, available for free at Visual 6502, the NMI, IRQ, and RES all work (essentially) the same. They also work (essentially) the same as the BRK instruction.
Which got me curious and I started playing around with VICE. It seems VICE has a core bug: RES (reset). I mean this is, LITERALLY, the first the thing the CPU ever does when it powers on (or when it gets reset), and yet somehow the VICE team, despite all their otherwise amazing cycle accuracy, seems to have FAILED!
Three important things that most experienced 6502 programmers know:
- JSR pushes the PC-1 on the stack
- IRQ / NMI push the PC on the stack
3. After pushing stuff, the S (stack) register points 1 byte lower
The minus one with JSR is (indirectly) related to the reading of the opcode and target address from program memory. IRQ / NMI do not need to read anything from program memory so it should be only a mild surprise the true (not minus one) address is saved on the stack.
Also, IRQ, NMI -- and even BRK -- set the I-flag (interrupt disable).
However, playing around with VICE (by changing the ROM reset vector) I discovered some things that SEEM wrong:
Comments everybody!!!
Unfortunately both the C64 and C128 (as far as I can tell) invoke SOME kind of ROM (internal or cartridge) during reset which means I can't directly test this behavior (since I don't have an [[E]EP]ROM programmer).
Any thoughts? [Sorry if my quick thought became an essay!]
Also, IRQ, NMI -- and even BRK -- set the I-flag (interrupt disable).
However, playing around with VICE (by changing the ROM reset vector) I discovered some things that SEEM wrong:
- During RES, PC-1 is pushed to the stack (contrary to IRQ and NMI)
- After RES, the stack pointer points to the last byte written (not 1 byte lower like every other stack-pushing function)
- After RES, the I flag is not set (contrary to IRQ, NMI, and BRK)
Comments everybody!!!
Unfortunately both the C64 and C128 (as far as I can tell) invoke SOME kind of ROM (internal or cartridge) during reset which means I can't directly test this behavior (since I don't have an [[E]EP]ROM programmer).
Any thoughts? [Sorry if my quick thought became an essay!]