Interrupt instability of Z80 mode with FAST 2MHz enabled

jusalak
PET User

Posts: 40

Interrupt instability of Z80 mode with FAST 2MHz enabled Jul 26, 2023 14:32:50 GMT

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Post by jusalak on Jul 26, 2023 14:32:50 GMT

There is a mention in an old thread that Z80 interrupts crash the C128 when 2 MHz is enabled (in D030).

Linards Ticmanis: Also it seems that interrupts
almost unavoidably crash the Z80 in FAST state. Turning off interrupts
(DI) seems to be unavoidable if you wantto "survive" this mode. Without a scope that was pretty much all I could
discover.
groups.google.com/g/comp.sys.cbm/c/ZXRYQODs4ng?pli=1

I can confirm this myself as I wrote a test program which runs one Z80 interrupt in FAST mode, and it has approximately one in four probability of crashing the machine, which occurs in a weird manner with somewhat varying results; garbage in screen and memory partly cleared. The type of interrupt (CIA or VIC) or VIC screen blanking does not seem to affect the result.

Any idea what exactly causes this?

Earlier it was determined that Z80 speed is not affected in FAST mode, if VIC screen is blanked.

c-128.freeforums.net/thread/614/emulator-cycle-exactness-trial-timers

remark
PET User

Posts: 69

Interrupt instability of Z80 mode with FAST 2MHz enabled Aug 1, 2023 19:03:19 GMT

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Post by remark on Aug 1, 2023 19:03:19 GMT

Even in fast mode with screen blanking on, the VIC-II still needs to do the ram refresh every scanline. For this VIC-II switches back to 1 MHz and after that back to 2 MHz again. So maybe this switching causes the VIC-II and Z-80 get 'out of sync', or that the read and write buffers for the Z-80 get corrupted by the switching. All this when the Z-80 is servicing an interrupt.

Last Edit: Aug 1, 2023 19:16:15 GMT by remark

it's more fun to compute

c128old
Vic 20 User

Posts: 84

Interrupt instability of Z80 mode with FAST 2MHz enabled Oct 1, 2023 17:37:50 GMT

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Post by c128old on Oct 1, 2023 17:37:50 GMT

"..All this when the Z-80 is servicing an interrupt."

Can this be tested?
For the Z80 side, one can wait for the IRQ ('halt') so that you always update D505 where no IRQ happens.
What if the hang-up is on 6502 side: it finding an unsavory bus value?
since IRQ is shared, servicing it on z80 side should clear 6502 from unexpected IRQ.
Vice versa, going from 6502 to Z80, some IRQ guard can be put in place. (what about NMI?)

I assume this is related to using the REU (which also takes over the bus) from Z80.
(The C128 RefGUide simply states to not do this.)

Commodore 128

Interrupt instability of Z80 mode with FAST 2MHz enabled

Post by jusalak on Jul 26, 2023 14:32:50 GMT

Post by remark on Aug 1, 2023 19:03:19 GMT

Post by c128old on Oct 1, 2023 17:37:50 GMT

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