Post by goodwell on Jan 7, 2024 12:05:25 GMT
Hi all,
in this video on YouTube, hardware scrolling on the VDC-Chip is demonstrated.
www.youtube.com/watch?v=A-DY_vlPeFM&lc=UgyMIy_0nPBsAviKdgZ4AaABAg
Based on the learnings there (offset between Attribute-RAM and Screen-RAM is required for this to look right), oziphantom commented that it might be possible to use this for CGA-Lowres with 16kB VRAM only.
The idea is to create an interleaved memory layout by setting Address-Increment-Per-Row to 80.
That allows to have Screen-RAM in one row and Attribute-RAM in the next row.
The content of Screen-RAM doesn't matter, as it's only 0x0F all the way through.
(see details in this video: youtu.be/yvTVJPRz8GY?si=TpDoYsQkIdtBsbOI)
The individual pixels of the screen are defined by Attribute-RAM, which requires 8000 bytes.
I tried this in z64k, but only the top-half of the screen renders correctly.
Unfortunately, I can't attach screenshots from z64k or the disk-image with the code and assets.
However, I'll post the basic code here.
If anyone is interested in a conversation about this, please visit the forum over here: www.forum64.de/index.php?thread/138952-vdc-und-cga-composite/&postID=2088900#post2088900
And don't mind that most content is in german, I'm perfectly fine with having conversations in english - and it happens in other threads, too.
in this video on YouTube, hardware scrolling on the VDC-Chip is demonstrated.
www.youtube.com/watch?v=A-DY_vlPeFM&lc=UgyMIy_0nPBsAviKdgZ4AaABAg
Based on the learnings there (offset between Attribute-RAM and Screen-RAM is required for this to look right), oziphantom commented that it might be possible to use this for CGA-Lowres with 16kB VRAM only.
The idea is to create an interleaved memory layout by setting Address-Increment-Per-Row to 80.
That allows to have Screen-RAM in one row and Attribute-RAM in the next row.
The content of Screen-RAM doesn't matter, as it's only 0x0F all the way through.
(see details in this video: youtu.be/yvTVJPRz8GY?si=TpDoYsQkIdtBsbOI)
The individual pixels of the screen are defined by Attribute-RAM, which requires 8000 bytes.
I tried this in z64k, but only the top-half of the screen renders correctly.
Unfortunately, I can't attach screenshots from z64k or the disk-image with the code and assets.
However, I'll post the basic code here.
# VDC-LORES
# 16K VERSION
10 DEF FN W(ZZ)=PEEK(ZZ)+PEEK(ZZ+1)*256
20 BS=FN W(45)
30 BE=FN W(4624)
# DB=DATA BEGIN
# DE=DATA END
40 DB=BE+1:DE=DB+8000
50 PRINT "BASIC FROM "BS" TO "BE"."
60 PRINT "LEAVES "FRE(0)" BYTES FREE."
70 DD=PEEK(186)
80 BLOAD "VDCBASICAC6.BIN",B0,U(DD):SYS DEC("AC6")
90 PRINT "LOADING VDCLORES2.DAT ... ";
100 BLOAD "VDCLORES2.DAT",B0,P(DB),U(DD)
110 PRINT "DONE"
120 DISP 80:ATTR 80
# 2 SCANLINES PER CHAR, 160 SCANLINES (EACH VAL +1)
130 RGW 0,127:RGW 4,155:RGW 6,100:RGW 7,140:RGW 9,1
140 RGO 25,128:REM BITMAP MODE ON
150 RGW 1,79:RGW 27,81
160 RGW 36,0
170 VMF 0,15,16000
180 D=0:D1=80
190 FOR L=0 TO 49
200 RTV DB+D,D1,80
210 D=D+80:D1=D1+160
220 NEXT
225 PRINT "PAUSE":GETKEY I$
230 FOR L=50 TO 99
240 RTV DB+D,D1,80
250 D=D+80:D1=D1+160
260 NEXT
300 VMF 0,0,160
If anyone is interested in a conversation about this, please visit the forum over here: www.forum64.de/index.php?thread/138952-vdc-und-cga-composite/&postID=2088900#post2088900
And don't mind that most content is in german, I'm perfectly fine with having conversations in english - and it happens in other threads, too.