Post by jusalak on Jan 20, 2024 18:30:03 GMT
When 2 MHz is enabled in VIC register $D030, weird behavior occurs with Z80 in certain situations. Interrupt instability was already discussed before.
When enabling 2 MHz with POKE53296,1 before running the program
>01c00 00 0b 1c 0a 00 9e 37 31
>01c08 38 31 00 00 00 ad 00 ff
>01c10 48 78 ad ee ff 48 ad ef
>01c18 ff 48 ad f0 ff 48 a9 3e
>01c20 8d 00 ff a9 c3 8d ee ff
>01c28 a9 53 8d ef ff a9 1c 8d
>01c30 f0 ff ad 05 d5 48 a9 b0
>01c38 8d 05 d5 ea ea 68 8d 05
>01c40 d5 68 8d f0 ff 68 8d ef
>01c48 ff 68 8d ee ff 68 8d 00
>01c50 ff 58 60 f3 01 00 02 11
>01c58 00 38 21 62 1c ed b0 c3
>01c60 00 38 31 f0 37 01 30 d0
>01c68 ed 78 f5 c5 3e 00 ed 79
>01c70 01 00 30 3e 31 02 0c 20
>01c78 fc 04 02 3e c3 32 31 31
>01c80 01 64 38 ed 43 32 31 3e
>01c88 30 ed 47 ed 5e 01 11 d0
>01c90 ed 78 e6 7f ed 79 0c 3e
>01c98 f9 ed 79 01 19 d0 3e 01
>01ca0 ed 79 0c ed 79 fb 01 f4
>01ca8 01 76 0b 78 fe ff 20 f9
>01cb0 f3 01 12 d0 3e ff ed 79
>01cb8 01 19 d0 3e 01 ed 79 c1
>01cc0 f1 ed 79 c3 e0 ff f5 c5
>01cc8 01 19 d0 3e 01 ed 79 01
>01cd0 20 d0 ed 78 3c ed 79 01
>01cd8 11 d0 ed 78 e6 f7 ed 79
>01ce0 0c ed 78 fe 00 20 fa 0d
>01ce8 ed 78 e6 7f f6 08 ed 79
>01cf0 01 20 d0 ed 78 3d ed 79
>01cf8 c1 f1 fb c9 00 00 00 00
results in push bc instruction at address 3809h (C5h) corrupted to A8h.
ld bc,0d030h
in a,(c)
push af
push bc
ld a,00h
out (c),a
This seems to be related somehow to the previous in a,(c) instruction.
What is more, one of my two C128s (the older one, both are flat PAL) did not run the program to the end (the other did). The results seem to vary considerably among different examples of real hardware.
In any case, before running Z80 code on C128, SLOW mode should be ensured. FAST mode would not give any advantage with Z80.