Simple Z80 BootROM Copy - Disassembly & Comments included
Oct 25, 2018 17:08:33 GMT
willymanilly likes this
Post by jmpff3d on Oct 25, 2018 17:08:33 GMT
I noticed there were some users asking how to copy the Z80 BootROM. There really isn't much to it. It can be done with far less effort than what I put in the script/code here. Any bloat in the work below is a thin attempt at robustness. ... If you spot any bugs, let me know !
Full release available at: csdb.dk/release/index.php?id=170658
EDIT : Partial Memory Dump of copied Z80 BootROM.
Full release available at: csdb.dk/release/index.php?id=170658
0 rem simple z80 bootrom copy using z80 ldir instruction, by xmikex - october 2018
10 slow:trap 999:zz=peek(186):fori=11776to11871:reada$:pokei,dec(a$):nexti
20 printchr$(147):poke53280,0:poke53281,0:j=0:jj=0
30 sys11776:print"*** z80 bootrom copy v0.1 by xmikex ***":print
40 print"on powerup, c-128 relocates z80 bootrom":print" from $d000-dfff to $0000-0fff"
50 print"the z80 cpu can then see bootrom at the":print" default z80 $0000 startup address":print
60 print" this program switches to z80 cpu, and":print" instructs z80 to copy bootrom to ram,"
70 print"then switches back to 8502 for disksave":print" and further user interaction.":print
80 print"rom copied from $0000-0fff to $3000-3fff":print
90 print" ";chr$(18);"press any key for fast mode rom verify";:print:getkeyz$:fast
100 fori=12288to16383:a=peek(i):b=b+a:ifi>jthenslow:print"$";hex$(i);" : ";:printright$(hex$(a),2);:print:j=i+1023:jj=jj+a
110 fast:nexti:slow:ifjj<>553orb<>375305thenprint:print"copy error ... aborting!":end
140 print" ";chr$(18);"z80 bootrom copy verified as good!":print
150 print"save 'z80bootrom' to drive";zz;"?";
160 getkeyz$:ifz$="y"orz$="Y"then200
170 print:input"what drive (8-30) would you prefer";z$:zz=val(z$)
180 ifzz<8orzz>30thenprint"* drive number out of range, try again *":goto170
200 bsave"@z80bootrom",d0,u(zz),b15,p12288 to p16384:print:directory u(zz):printds$:end
999 print:print"unexpected error, aborting !":stop
1000 data a9,00,8d,1a,d0,a9,7f,8d,0d,dc,78,a9,3e,8d,00,ff
1010 data a2,03,bd,41,2e,9d,ee,ff,ca,10,f7,a9,0b,8d,11,d0
1020 data ad,11,d0,30,fb,ad,11,d0,10,fb,a9,b0,8d,05,d5,ea
1030 data a9,1b,8d,11,d0,58,a9,00,8d,0d,dc,a9,f1,8d,1a,d0
1040 data 60,21,45,2e,e9,f3,3e,3e,32,00,ff,21,00,00,11,00
1050 data 30,01,00,10,ed,b0,fb,01,05,d5,3e,b1,ed,79,00,cf
; MMU BitSwitch guide - https://pastebin.com/Wh2EKdwt
;
; $2e00 - start of hexbyte code encoded in data statements
;
. f2e00 a9 00 lda #$00 ; specifically disable VIC-II IRQ
. f2e02 8d 1a d0 sta $d01a
. f2e05 a9 7f lda #$7f ; specifically disable CIA IRQ
. f2e07 8d 0d dc sta $dc0d
. f2e0a 78 sei ; disable all IRQs for good measure
. f2e0b a9 3e lda #$3e ; Store 00111110 (#$3e) into MMU configuration reg in high ram mirror
. f2e0d 8d 00 ff sta $ff00
. f2e10 a2 03 ldx #$03 ; copy four bytes of Z80 code from $2e41-2e44 to $ffee-fff1.
. f2e12 bd 41 2e lda $2e41,x
. f2e15 9d ee ff sta $ffee,x ; $ffee is where Z80 will start on activation, thanks to prior work from bootlink ROM setup.
. f2e18 ca dex
. f2e19 10 f7 bpl $2e12
. f2e1b a9 0b lda #$0b ; disable the 40 column screen
. f2e1d 8d 11 d0 sta $d011
. f2e20 ad 11 d0 lda $d011 ; don't disable the 40 column screen while the electron gun is still
. f2e23 30 fb bmi $2e20 ; in the visible area, wait for vertical-blank in this section
. f2e25 ad 11 d0 lda $d011
. f2e28 10 fb bpl $2e25
. f2e2a a9 b0 lda #$b0 ; Store 10110000 (#$b0) into MMU mode configuration reg .. see MMU BitSwitch guide.
. f2e2c 8d 05 d5 sta $d505 ; This sends 8502 into tristate and activates Z80.
. f2e2f ea nop
: NOP at $2e2f because ROM routines also issue NOP when switching 8502 / Z80 to give the next CPU a moment to switch in.
; Z80 begins crunching its subroutine, while 8502 waits here for reactivation.
. f2e30 a9 1b lda #$1b ; when 8502 is reactivated, this is the first instruction it sees, enable the 40 column screen
. f2e32 8d 11 d0 sta $d011
. f2e35 58 cli ; enable all IRQ
. f2e36 a9 00 lda #$00 ; specifically enable CIA IRQ
. f2e38 8d 0d dc sta $dc0d
. f2e3b a9 f1 lda #$f1 ; specifically enable VIC-II IRQ
. f2e3d 8d 1a d0 sta $d01a
. f2e40 60 rts ; return from subroutine, pass control back to BASIC script.
. f2e41 21 45 2E LD HL, #$2E45 ; 21 45 2E E9 opcode bytes are copied over to $ffee-fff1 by 8502 code above.
; When Z80 activates, it executes these opcodes starting first at $ffee.
. f2e44 E9 LD PC,HL ; $2e45 is loaded into Z80 program counter, and the rest of Z80 code starts from there.
; Note: There is limited space in $ffee...+ for Z80 code. Z80 code should jump to another
; address or change the Z80 Program Counter to point to another address.
; Z80 working code begins in this next segment, starting at $2e45 as noted above.
. f2e45 F3 DI ; Disable Z80 IRQs
. f2e46 3E 3E LD A, #$3E ; Store 00111110 (#$3e) into MMU configuration reg in high ram mirror
. f2e48 32 00 FF LD ($FF00),A ; see MMU BitSwitch guide.
. f2e4b 21 00 00 LD HL, #$0000 ; standard LDIR setup, start address at ($0000) for bytes to be copied
. f2e4e 11 00 30 LD DE, #$3000 ; start of destination addresss ($3000) where bytes will be copied
. f2e51 01 00 10 LD BC, #$1000 ; amount of bytes to copy (4096 bytes) starting from start address $0000
. f2e54 ED B0 LDIR ; invoke LDIR copy using HL/DE/BC setup info
. f2e56 FB EI ; Enable Z80 IRQs
. f2e57 01 05 D5 LD BC, #$D505 ; Store 10110001 (#$b1) into MMU mode configuration reg .. see MMU BitSwitch guide.
. f2e5a 3E B1 LD A, #$B1 ; This sends Z80 into tristate and activates 8502.
. f2e5c ED 79 OUT BC,A
. f2e5e 00 NOP
: NOP at $2e5e because ROM routines also issue NOP when switching 8502 / Z80 to give the next CPU a moment to switch in.
. f2e5f CF RST 08 ; Legacy Z80 restart 08h init (at C-128 Z80 boot rom), stands here as fallthrough backup.
EDIT : Partial Memory Dump of copied Z80 BootROM.
>f31f0 cd 26 05 ff 81 0a 42 4f:M&....bo
>f31f8 4f 54 49 4e 47 20 43 50:oting cp
>f3200 2f 4d 20 50 4c 55 53 00:/m plus.
>f3208 01 18 d0 3e b6 ed 79 cd:..P>VMYM
>f3210 d2 02 c2 ff 04 21 b2 0f:R.B..!R.
>f3218 22 02 3c cd b4 00 cd b4:".<MT.MT
>f3220 00 2a 09 3c 7c b5 ca ff:.*.<.UJ.
>f3228 04 21 09 3c 22 02 3c cd:.!.<".<M
>f3230 6d 03 21 00 34 11 29 3c:M.!.4.)<
>f3238 01 0c 00 ed b0 cd 26 05:...MPM&.
>f3240 8a 00 00 21 80 34 cd 34:...!.4M4
>f3248 05 21 00 35 22 04 3c cd:.!.5".<M
>f3250 26 05 83 0c 44 41 54 41:&...data
>f3258 20 54 41 42 4c 45 53 00: tables.
>f3260 2a 33 3c 22 09 fd 21 32:*3<"..!2
>f3268 3c cd 31 03 22 0b fd cd:<M1."..M
>f3270 44 03 11 80 00 19 20 f7:d..... W
>f3278 cd 26 05 84 0c 43 4f 4d:M&...com
>f3280 4d 4f 4e 20 43 4f 44 45:mon code
>f3288 00 21 2a 3c cd 24 03 cd:.!*<M$.M
>f3290 26 05 85 0c 42 41 4e 4b:&...bank
>f3298 45 44 20 43 4f 44 45 00:ed code.
>f32a0 21 2c 3c cd 24 03 cd 26:!,<M$.M&
>f32a8 05 86 0c 42 49 4f 53 38:...bios8